Hi, Jonathan, On 07.12.2024 20:34, Jonathan Cameron wrote: > On Fri, 6 Dec 2024 13:13:35 +0200 > Claudiu <claudiu.beznea@xxxxxxxxx> wrote: > >> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> >> >> Add ADC support for the Renesas RZ/G3S SoC. The key features of this IP >> include: >> - 9 channels, with one dedicated to reading the temperature reported by the >> Thermal Sensor Unit (TSU) >> - A different default ADCMP value, which is written to the ADM3 register. >> - Different default sampling rates >> - ADM3.ADSMP field is 8 bits wide >> - ADINT.INTEN field is 11 bits wide >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > Hi Claudiu > > As my comments were all minor stuff, I have applied this. > However they were the sort of minor changes that result in lots of > fuzz and hand editing when applying so please check the result. > Applied to the testing branch of iio.git. I checked and tested testing branch at iio.git. Everything is good. Thank you for taking care of this, Claudiu > > Thanks, > > Jonathan
