On Tue, 3 Dec 2024 17:15:40 +0800
Eason Yang <j2anfernee@xxxxxxxxx> wrote:
> Add Nuvoton NCT7201/NCT7202 system voltage monitor 12-bit ADC driver
>
> NCT7201/NCT7202 supports up to 12 analog voltage monitor inputs and up to
> 4 SMBus addresses by ADDR pin. Meanwhile, ALERT# hardware event pins for
> independent alarm signals, and the all threshold values could be set for
> system protection without any timing delay. It also supports reset input
> RSTIN# to recover system from a fault condition.
>
> Currently, only single-edge mode conversion and threshold events support.
>
> Signed-off-by: Eason Yang <j2anfernee@xxxxxxxxx>
Hi Eason,
Given you have some good reviews already I only took a very quick glance
through. A few things inline
Jonathan
> diff --git a/drivers/iio/adc/nct720x.c b/drivers/iio/adc/nct720x.c
> new file mode 100644
> index 000000000000..b28b5f4d7d70
> --- /dev/null
> +++ b/drivers/iio/adc/nct720x.c
> +
> +static int nct720x_write_event_value(struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan,
> + enum iio_event_type type,
> + enum iio_event_direction dir,
> + enum iio_event_info info,
> + int val, int val2)
> +{
> + struct nct720x_chip_info *chip = iio_priv(indio_dev);
> + int index, err = 0;
> + long v1, v2, volt;
> +
> + index = nct720x_chan_to_index[chan->address];
> + volt = (val * NCT720X_IN_SCALING_FACTOR) / NCT720X_IN_SCALING;
> + v1 = volt >> 5;
> + v2 = (volt & REG_VIN_LIMIT_LSB_MASK) << 3;
> +
> + if (chan->type != IIO_VOLTAGE)
> + return -EOPNOTSUPP;
> +
> + if (info == IIO_EV_INFO_VALUE) {
> + if (dir == IIO_EV_DIR_FALLING) {
> + guard(mutex)(&chip->access_lock);
Might as well move this up one level as it is called in both legs.
> + err = regmap_write(chip->regmap, REG_VIN_LOW_LIMIT[index], v1);
> + if (err < 0)
> + dev_err(&indio_dev->dev, "Failed to write REG_VIN%d_LOW_LIMIT\n",
> + index + 1);
> +
> + err = regmap_write(chip->regmap, REG_VIN_LOW_LIMIT_LSB[index], v2);
> + if (err < 0)
> + dev_err(&indio_dev->dev, "Failed to write REG_VIN%d_LOW_LIMIT_LSB\n",
> + index + 1);
> +
> + } else {
> + guard(mutex)(&chip->access_lock);
> + err = regmap_write(chip->regmap, REG_VIN_HIGH_LIMIT[index], v1);
> + if (err < 0)
> + dev_err(&indio_dev->dev, "Failed to write REG_VIN%d_HIGH_LIMIT\n",
> + index + 1);
> +
> + err = regmap_write(chip->regmap, REG_VIN_HIGH_LIMIT_LSB[index], v2);
> + if (err < 0)
> + dev_err(&indio_dev->dev, "Failed to write REG_VIN%d_HIGH_LIMIT_LSB\n",
> + index + 1);
> + }
> + }
> + return err;
> +}
> +
> +static const struct iio_info nct720x_info = {
> + .read_raw = nct720x_read_raw,
> + .read_event_config = nct720x_read_event_config,
> + .write_event_config = nct720x_write_event_config,
> + .read_event_value = nct720x_read_event_value,
> + .write_event_value = nct720x_write_event_value,
Given you are supporting with and without interrupts, should probably pick between
versions of this that have the event config part and one that doesn't.
> +};
> +
> +static const struct nct720x_adc_model_data nct7201_model_data = {
> + .model_name = "nct7201",
> + .channels = nct7201_channels,
> + .num_channels = ARRAY_SIZE(nct7201_channels),
> + .vin_max = 8,
> +};
> +
> +static const struct nct720x_adc_model_data nct7202_model_data = {
> + .model_name = "nct7202",
> + .channels = nct7202_channels,
> + .num_channels = ARRAY_SIZE(nct7202_channels),
> + .vin_max = 12,
> +};
> +
> +static int nct720x_init_chip(struct nct720x_chip_info *chip)
> +{
> + u8 data[2];
> + unsigned int value;
> + int err;
> +
> + err = regmap_write(chip->regmap, REG_CONFIGURATION, BIT_CONFIGURATION_RESET);
> + if (err) {
> + dev_err(&chip->client->dev, "Failed to write REG_CONFIGURATION\n");
> + return err;
> + }
> +
> + /*
> + * After about 25 msecs, the device should be ready and then
> + * the Power Up bit will be set to 1. If not, wait for it.
> + */
> + mdelay(25);
> + err = regmap_read(chip->regmap, REG_BUSY_STATUS, &value);
> + if (err < 0)
> + return err;
> + if (!(value & BIT_PWR_UP))
> + return err;
> +
> + /* Enable Channel */
> + err = regmap_write(chip->regmap, REG_CHANNEL_ENABLE_1, REG_CHANNEL_ENABLE_1_MASK);
> + if (err) {
> + dev_err(&chip->client->dev, "Failed to write REG_CHANNEL_ENABLE_1\n");
> + return err;
> + }
> +
> + if (chip->vin_max == 12) {
> + err = regmap_write(chip->regmap, REG_CHANNEL_ENABLE_2, REG_CHANNEL_ENABLE_2_MASK);
> + if (err) {
> + dev_err(&chip->client->dev, "Failed to write REG_CHANNEL_ENABLE_2\n");
> + return err;
> + }
> + }
> +
> + guard(mutex)(&chip->access_lock);
> + err = regmap_read(chip->regmap, REG_CHANNEL_ENABLE_1, &value);
> + if (err < 0)
> + return err;
> + data[0] = (u8)value;
> +
> + err = regmap_read(chip->regmap, REG_CHANNEL_ENABLE_2, &value);
> + if (err < 0)
> + return err;
Here I think you can use a bulk read as the registers are next to each other.
> + data[1] = (u8)value;
> +
> + value = get_unaligned_le16(data);
> + chip->vin_mask = value;
> +
> + /* Start monitoring if needed */
> + err = regmap_read(chip->regmap, REG_CONFIGURATION, &value);
> + if (err < 0) {
> + dev_err(&chip->client->dev, "Failed to read REG_CONFIGURATION\n");
> + return value;
> + }
> +
> + value |= BIT_CONFIGURATION_START;
> + err = regmap_write(chip->regmap, REG_CONFIGURATION, value);
> + if (err < 0) {
> + dev_err(&chip->client->dev, "Failed to write REG_CONFIGURATION\n");
> + return err;
> + }
> +
> + return 0;
> +}
