On Fri, 15 Nov 2024 11:12:00 +0100 Guillaume Ranquet <granquet@xxxxxxxxxxxx> wrote: > The ad7173 family of chips has up to four calibration modes. > > Internal zero scale: removes ADC core offset errors. > Internal full scale: removes ADC core gain errors. > System zero scale: reduces offset error to the order of channel noise. > System full scale: reduces gain error to the order of channel noise. > > All voltage channels will undergo an internal zero/full scale > calibration at bootup. > > System zero/full scale can be done after bootup using the newly created > iio interface 'sys_calibration' and 'sys_calibration_mode' > > Signed-off-by: Guillaume Ranquet <granquet@xxxxxxxxxxxx> > --- > Calibration on the ad7173 family is the same as on the ad7192 family of > chips and mostly uses the ad_sigma_delta common code. The documentation in sysfs-bus-iio-adc-ad7192 needs promoting. It is still fairly devices specific though. Maybe we need a sysfs-bus-iio-adc-ad ? Note that documentation can only be in one file for a given attribute or the docs build system complains. Other than that, looks good to me. Jonathan
