On 11/8/24 12:18 PM, Uwe Kleine-König wrote: > The ad7124-4 and ad7124-8 both support 16 channel registers. Don't > accept more (logical) channels from dt than that. Why should the devicetree be limited by the number of channel registers? Channel registers are a resource than can be dynamically assigned, so it doesn't seem like the devicetree should be specifying that assignment. It's true we can't do a buffered read of more than 8 or 16 channels at the same time because it is limited by the number of channel registers available on the chip. But it seems reasonable that if there are more logical channels than that, we could read 8 logical channels, then disable those and enable a different 8 logical channels and read those by reconfiguring the channel registers.
