On Thu, Oct 03, 2024 at 10:14:57AM +0000, Miclaus, Antoniu wrote: > > On 10/1/24 8:51 AM, Miclaus, Antoniu wrote: > > >>> Regarding the bulk writes/reads, the msb/mid/lsb registers need to be > > >>> read/write in a specific order and the addresses are not incremental, > > >> > > >> We have _noinc() variants of regmap accessors. > > > [Miclaus, Antoniu] > > > I think _noinc() functions read from the same register address so it doesn't > > > apply. > > > I am reading values from multiple register addresses that are not reg_addr, > > > reg_addr+1, reg_addr+2. > > > > I'm confused by the statement that the registers are not incremental. > > > > For example, this patch defines... > > > > +#define AD485X_REG_CHX_OFFSET_LSB(ch) > > AD485X_REG_CHX_OFFSET(ch) > > +#define AD485X_REG_CHX_OFFSET_MID(ch) > > (AD485X_REG_CHX_OFFSET_LSB(ch) + 0x01) > > +#define AD485X_REG_CHX_OFFSET_MSB(ch) > > (AD485X_REG_CHX_OFFSET_MID(ch) + 0x01) > > > > This looks exactly like reg_addr, reg_addr+1, reg_addr+2 to me. > Yes you are right. Although I tested with hardware and it seems that the registers > are not properly written when using bulk operations. My guess is that holding CS low during > the entire transaction might be a possible issue. Any suggestions are appreciated. Okay, so each byte has to be written as a separate SPI transfer? I believe we have already examples of the drivers for such a hardware in the Linux kernel, but I can't throw any example form top of my head. > > >>> so I am not sure how the bulk functions fit. On this matter, we will need > > >>> unsigned int (not u8) to store the values read via regmap_read, and in this > > >>> case we will need extra casts and assignments to use get_unaligned. -- With Best Regards, Andy Shevchenko
