On 9/6/24 8:52 AM, Nuno Sá wrote: > On Fri, 2024-09-06 at 14:13 +0200, Krzysztof Kozlowski wrote: >> On 06/09/2024 13:53, Nuno Sá wrote: >>> On Fri, 2024-09-06 at 11:37 +0200, Krzysztof Kozlowski wrote: >>>> On 06/09/2024 11:11, Angelo Dureghello wrote: >>>>> Hi Krzysztof, >>>>> >>>>> On 06/09/24 9:22 AM, Krzysztof Kozlowski wrote: >>>>>> On Thu, Sep 05, 2024 at 05:17:35PM +0200, Angelo Dureghello wrote: >>>>>>> From: Angelo Dureghello <adureghello@xxxxxxxxxxxx> >>>>>>> >>>>>>> Add a new compatible for the ad3552r variant of the generic DAC IP. >>>>>>> >>>>>>> The ad3552r DAC IP variant is very similar to the generic DAC IP, >>>>>>> register map is the same, but some register fields are specific to >>>>>>> this IP, and also, a DDR QSPI bus has been included in the IP. >>>>>>> >>>>>>> Signed-off-by: Angelo Dureghello <adureghello@xxxxxxxxxxxx> >>>>>>> --- >>>>>>> Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml | 1 + >>>>>>> 1 file changed, 1 insertion(+) >>>>>>> >>>>>>> diff --git a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml >>>>>>> b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml >>>>>>> index a55e9bfc66d7..c0cccb7a99a4 100644 >>>>>>> --- a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml >>>>>>> +++ b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml >>>>>>> @@ -24,6 +24,7 @@ properties: >>>>>>> compatible: >>>>>>> enum: >>>>>>> - adi,axi-dac-9.1.b >>>>>>> + - adi,axi-dac-ad3552r >>>>>> I am sorry, but what is the product here? It looks like either wrong >>>>>> order or even completely redundant. What is ad3552r? >>>>>> >>>>>> And why versions are mixed with real products but without any >>>>>> compatibility. What does the version express in such case? >>>>> >>>>> dac-ad3552r IP (fpga) is a variant of the dac IP, very similar, >>>>> about the version, it still reads as 9.1.b >>>>> >>>>> so i can eventually change it to: >>>>> >>>>> adi,axi-dac-ad3552-9.1.b >>>>> >>>>> Should be more correct. >>>> >>>> No. First ad3552r is the product, so axi-dac is redundant. Second why >>>> adding versions if you have product names? Versioning was allowed >>>> because apparently that's how these are called, but now it turns out it >>>> is not version but names. >>>> >>> >>> Let me try to explain on how this whole thing works... >>> >>> We have a generic FPGA IP called axi-dac (same story is true for the other axi- >>> adc >>> IP) which adds some basic and generic capabilities like DDS (Direct digital >>> synthesis) and the generic one is the compatible existing now. This IP is a so >>> called >>> IIO backend because it then connects to a real converter (in this case DACs) >>> extending it's capabilities and also serving as an interface between another >>> block >>> (typical DMA as this is used for really high speed stuff) and the device. Now, >>> depending on the actual device, we may need to add/modify some features of the IP >>> and >>> this is what's happening for the ad3552r DAC (it's still build on top of the >> >> What is "ad3552"? DAC right? Then as I said axi-dac is redundant. We do >> not call ti,tmp451 a ti,sensor-tmp451, right? >> > > Yes, I agree the DAC part is redundant. But I think the axi prefix (or suffix) is > meaningful to differentiate it from the bindings for the device itself. > The binding is for this [1] IP core. The documentation calls the core "AXI AD3552R", so I agree that "adi,axi-ad2552r" is the most sensible compatible name. http://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
