From: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
There is a version AXI DAC IP block (for FPGAs) that provides
a physical bus for AD3552R and similar chips. This can be used
instead of a typical SPI controller to be able to use the chip
in ways that typical SPI controllers are not capable of.
The binding is modified so that either the device is a SPI
peripheral or it uses an io-backend.
Signed-off-by: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
---
.../devicetree/bindings/iio/dac/adi,ad3552r.yaml | 39 ++++++++++++++++++++--
1 file changed, 37 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
index fc8b97f82077..1874486229ad 100644
--- a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
+++ b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
@@ -60,12 +60,34 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
+ io-backends:
+ description: The iio backend reference.
+ An example backend can be found at
+ https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
+ maxItems: 1
+
'#address-cells':
const: 1
'#size-cells':
const: 0
+if:
+ required:
+ - reg
+
+then:
+ $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+ properties:
+ io-backends: false
+
+ required: [ spi-max-frequency ]
+
+else:
+ required:
+ - io-backends
+
patternProperties:
"^channel@([0-1])$":
type: object
@@ -207,8 +229,6 @@ allOf:
required:
- compatible
- - reg
- - spi-max-frequency
additionalProperties: false
@@ -238,4 +258,19 @@ examples:
};
};
};
+
+ - |
+ fpga_axi {
+ ad3552r {
+ compatible = "adi,ad3552r";
+ reset-gpios = <&gpio0 92 1>;
+ io-backends = <&backend>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel@0 {
+ reg = <0>;
+ adi,output-range-microvolt = <(-5000000) (5000000)>;
+ };
+ };
+ };
...
--
2.45.0.rc1
