Introduce new bindings for the clock measure IP found Amlogic SoCs.
These new bindings help bring IIO support to AML clock measure.
Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
---
NOTE:
#1: Splitting the register space looks odd. This is done to help support
future SoCs. From meson8 to sm1, duty register comes first, then the
reg space. On s4 and c3, duty comes after the reg space.
#2: 'reg' may look like a poor choice of name. This comes from the
documentation.
- MSR_CLK_REGx for the 'reg' space (x being a number)
- MSR_CLK_DUTY for the 'duty' space
.../iio/frequency/amlogic,clk-msr-io.yaml | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/frequency/amlogic,clk-msr-io.yaml
diff --git a/Documentation/devicetree/bindings/iio/frequency/amlogic,clk-msr-io.yaml b/Documentation/devicetree/bindings/iio/frequency/amlogic,clk-msr-io.yaml
new file mode 100644
index 000000000000..eeb268b4a607
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/frequency/amlogic,clk-msr-io.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/frequency/amlogic,clk-msr-io.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic System Clock Measurer
+
+description:
+ Internal clock rate sensor within Amlogic SoCs
+
+maintainers:
+ - Neil Armstrong <neil.armstrong@xxxxxxxxxx>
+
+properties:
+ compatible:
+ enum:
+ - amlogic,meson8-clk-msr-io
+ - amlogic,gx-clk-msr-io
+ - amlogic,axg-clk-msr-io
+ - amlogic,g12a-clk-msr-io
+ - amlogic,sm1-clk-msr-io
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: reg
+ - const: duty
+
+ "#io-channel-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ clk_msr: rate-sensor@18000 {
+ compatible = "amlogic,axg-clk-msr-io";
+ reg = <0x18004 0xc>,
+ <0x18000 0x4>;
+ reg-names = "reg", "duty";
+ #io-channel-cells = <1>;
+ };
--
2.43.0
