On Mon, 17 Jun 2024 09:50:02 -0400
Trevor Gamblin <tgamblin@xxxxxxxxxxxx> wrote:
> Instead of using regmap_update_bits() and passing the mask twice, use
> regmap_set_bits().
>
> Instead of using regmap_update_bits() and passing val = 0, use
> regmap_clear_bits().
>
> Suggested-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxx>
> Signed-off-by: Trevor Gamblin <tgamblin@xxxxxxxxxxxx>
> ---
> drivers/iio/gyro/mpu3050-core.c | 33 ++++++++++++---------------------
> 1 file changed, 12 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c
> index a791ba3a693a..ff1c81553045 100644
> --- a/drivers/iio/gyro/mpu3050-core.c
> +++ b/drivers/iio/gyro/mpu3050-core.c
> @@ -197,8 +197,8 @@ static int mpu3050_start_sampling(struct mpu3050 *mpu3050)
> int i;
>
> /* Reset */
> - ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
> - MPU3050_PWR_MGM_RESET, MPU3050_PWR_MGM_RESET);
> + ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM,
> + MPU3050_PWR_MGM_RESET);
> if (ret)
> return ret;
>
> @@ -513,12 +513,8 @@ static irqreturn_t mpu3050_trigger_handler(int irq, void *p)
> "FIFO overflow! Emptying and resetting FIFO\n");
> fifo_overflow = true;
> /* Reset and enable the FIFO */
> - ret = regmap_update_bits(mpu3050->map,
> - MPU3050_USR_CTRL,
> - MPU3050_USR_CTRL_FIFO_EN |
> - MPU3050_USR_CTRL_FIFO_RST,
> - MPU3050_USR_CTRL_FIFO_EN |
> - MPU3050_USR_CTRL_FIFO_RST);
> + ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL,
> + MPU3050_USR_CTRL_FIFO_EN | MPU3050_USR_CTRL_FIFO_RST);
I'll probably break this line up whilst applying.
> if (ret) {
> dev_info(mpu3050->dev, "error resetting FIFO\n");
> goto out_trigger_unlock;
> @@ -799,10 +795,8 @@ static int mpu3050_hw_init(struct mpu3050 *mpu3050)
> u64 otp;
>
> /* Reset */
> - ret = regmap_update_bits(mpu3050->map,
> - MPU3050_PWR_MGM,
> - MPU3050_PWR_MGM_RESET,
> - MPU3050_PWR_MGM_RESET);
> + ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM,
> + MPU3050_PWR_MGM_RESET);
> if (ret)
> return ret;
>
> @@ -872,8 +866,8 @@ static int mpu3050_power_up(struct mpu3050 *mpu3050)
> msleep(200);
>
> /* Take device out of sleep mode */
> - ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
> - MPU3050_PWR_MGM_SLEEP, 0);
> + ret = regmap_clear_bits(mpu3050->map, MPU3050_PWR_MGM,
> + MPU3050_PWR_MGM_SLEEP);
> if (ret) {
> regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);
> dev_err(mpu3050->dev, "error setting power mode\n");
> @@ -895,8 +889,8 @@ static int mpu3050_power_down(struct mpu3050 *mpu3050)
> * then we would be wasting power unless we go to sleep mode
> * first.
> */
> - ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
> - MPU3050_PWR_MGM_SLEEP, MPU3050_PWR_MGM_SLEEP);
> + ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM,
> + MPU3050_PWR_MGM_SLEEP);
> if (ret)
> dev_err(mpu3050->dev, "error putting to sleep\n");
>
> @@ -997,11 +991,8 @@ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig,
> return ret;
>
> /* Reset and enable the FIFO */
> - ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL,
> - MPU3050_USR_CTRL_FIFO_EN |
> - MPU3050_USR_CTRL_FIFO_RST,
> - MPU3050_USR_CTRL_FIFO_EN |
> - MPU3050_USR_CTRL_FIFO_RST);
> + ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL,
> + MPU3050_USR_CTRL_FIFO_EN | MPU3050_USR_CTRL_FIFO_RST);
and this one.
Assuming we don't need a v4 for some other reason,
Jonathan
> if (ret)
> return ret;
>
>
