On Sat, 2024-05-25 at 17:54 +0100, Jonathan Cameron wrote: > On Wed, 22 May 2024 15:14:56 +0200 > Nuno Sa via B4 Relay <devnull+nuno.sa.analog.com@xxxxxxxxxx> wrote: > > > From: Nuno Sa <nuno.sa@xxxxxxxxxx> > > > > When enabling the core, make sure DRP (Dynamic Reconfiguration Port) > > is locked. Most of the designs don't really use it but we still get the > > lock bit set. So let's do it all the time so the code is generic. > > > > While at it add proper mutex guards as we should not be able to disable > > the core in the middle of enabling it. Also reduce the timeout time to 1 > > microsecond as it seems to be enough and goes in line with what we have > > on the similar DAC core (adi-axi-dac). > > > > Signed-off-by: Nuno Sa <nuno.sa@xxxxxxxxxx> > Sounds like a fix, so fixes tag? > Can add one even though we do not need to rush any backport as the current user we have for this is not doing anything crazy :). Anyways, I'll then split the fix into a separate patch so it's more clear. - Nuno Sá
