On Thu, Nov 16, 2023 at 08:55:27AM +0530, Jishnu Prakash wrote: > PMIC5 Gen3 has a similar ADC architecture to that on PMIC5 Gen2, > with all SW communication to ADC going through PMK8550 which > communicates with other PMICs through PBS. The major difference is > that the register interface used here is that of an SDAM present on > PMK8550, rather than a dedicated ADC peripheral. There may be more than one > SDAM used for ADC5 Gen3. Each ADC SDAM has eight channels, each of which may > be used for either immediate reads (same functionality as previous PMIC5 and > PMIC5 Gen2 ADC peripherals) or recurring measurements (same as PMIC5 and PMIC5 > Gen2 ADC_TM functionality). In this case, we have VADC and ADC_TM functionality > combined into the same driver. > > Patches 1 adds bindings for ADC5 Gen3 peripheral. > > Patches 2 adds driver support for ADC5 Gen3. > > Patch 3 is a cleanup, to move the QCOM ADC dt-bindings files from > dt-bindings/iio to dt-bindings/iio/adc folder, as they are > specifically for ADC devices. It also fixes all compilation errors > with this change in driver and devicetree files and similar errors > in documentation for dtbinding check. Something wrong with the email chaining. Please be sure you are using --thread when preparing emails. -- With Best Regards, Andy Shevchenko
