This patch is a part of effort to support meson a1 SoC and make meson saradc driver independent from vendor boot code initialization in common. Core clock (passed to adc module thru dts) is supposed to be responsible for entier module and should be on before accessing modules' regs. I've made experiments and here are the results: on odroid-c1 (meson8) adc regs became readonly with core clock off: # disable clock (HHI_GCLK_MPEG0 bit 10) devmem 0xc1104140 32 0xBFFA72FF devmem 0xc110868C 0xE3A851FF devmem 0xc110868C 32 0xE3A85100 devmem 0xc110868C 0xE3A851FF # enable clock devmem 0xc1104140 32 0xBFFA76FF devmem 0xc110868C 0xE3A851FF devmem 0xc110868C 32 0xE3A85100 devmem 0xc110868C 0xE3A85100 on vim3 (a311d) adc regs became readonly with core clock off: # disable adc core clock: devmem 0xff80004C 32 0xFFFFFEFF # the adc register become readonly: devmem 0xff80902c 0x002C2002 devmem 0xff80902c 32 0x002C2000 devmem 0xff80902c 0x002C2002 on a1 adc registers are none-readable-writeable when adc core clock is off: devmem 0xfe002c2c 0x00002003 # disable clock devmem 0xfe00081c 32 0xFFFF9FFF devmem 0xfe002c2c 0x00000000 # enable clock devmem 0xfe00081c 32 0xFFFFFFFF devmem 0xfe002c2c 0x00002003 Changelog: v1->v2: patch 'iio: adc: meson: improve error logging at probe stage' - add fixes tag, previous version [1] - move to devm_clk_get_enabled - return enable/disable core clock calls to suspend \ resume callbacks but did it at the last step and the first step respectively patch 'iio: adc: meson: improve error logging at probe stage' patch was added to address Jonathan's comment [1] https://www.spinics.net/lists/linux-iio/msg80369.html George Stark (2): iio: adc: meson: fix core clock enable/disable moment iio: adc: meson: improve error logging at probe stage drivers/iio/adc/meson_saradc.c | 39 +++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 17 deletions(-) -- 2.38.4
