Re: [PATCH v2 2/4] arm64: dts: mt7986: add thermal and efuse

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Il 29/05/23 22:42, Frank Wunderlich ha scritto:
From: Daniel Golle <daniel@xxxxxxxxxxxxxx>

Add thermal related nodes to mt7986 devicetree.

Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx>
Signed-off-by: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx>
---
  arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 37 ++++++++++++++++++++++-
  1 file changed, 36 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index aa9e679b78e2..a409d5e845c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -337,6 +337,15 @@ spi1: spi@1100b000 {
  			status = "disabled";
  		};
+ auxadc: adc@1100d000 {
+			compatible = "mediatek,mt7986-auxadc";
+			reg = <0 0x1100d000 0 0x1000>;
+			clocks = <&infracfg CLK_INFRA_ADC_26M_CK>;
+			clock-names = "main";
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
+
  		ssusb: usb@11200000 {
  			compatible = "mediatek,mt7986-xhci",
  				     "mediatek,mtk-xhci";
@@ -375,6 +384,21 @@ mmc0: mmc@11230000 {
  			status = "disabled";
  		};
+ thermal: thermal@1100c800 {
+			#thermal-sensor-cells = <1>;
+			compatible = "mediatek,mt7986-thermal";
+			reg = <0 0x1100c800 0 0x800>;
+			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&infracfg CLK_INFRA_THERM_CK>,
+				 <&infracfg CLK_INFRA_ADC_26M_CK>,
+				 <&infracfg CLK_INFRA_ADC_FRC_CK>;
+			clock-names = "therm", "auxadc", "adc_32k";
+			mediatek,auxadc = <&auxadc>;
+			mediatek,apmixedsys = <&apmixedsys>;
+			nvmem-cells = <&thermal_calibration>;
+			nvmem-cell-names = "calibration-data";
+		};
+
  		pcie: pcie@11280000 {
  			compatible = "mediatek,mt7986-pcie",
  				     "mediatek,mt8192-pcie";
@@ -426,6 +450,18 @@ pcie_port: pcie-phy@11c00000 {
  			};
  		};
+ efuse: efuse@11d00000 {
+			compatible = "mediatek,mt7986-efuse",
+				     "mediatek,efuse";

Fits in one single line. After which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>





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