On Sat, Aug 13, 2022 at 6:55 PM Jonathan Cameron <jic23@xxxxxxxxxx> wrote:
>
> From: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
>
> ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
> on platforms with 128 byte cachelines above L1. Switch to the updated
> IIO_DMA_MINALIGN definition. Whilst here, move the marking to cover
> the whole union. That has not functional affect, but makes it slightly
not --> no ?
> easier to see what is going on.
Reviewed-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
>
> ---
> v2: Move the alignment marking to the union rather than an element in the
> union. (Andy Shevchenko)
> drivers/staging/iio/frequency/ad9832.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c
> index f43464db618a..6f9eebd6c7ee 100644
> --- a/drivers/staging/iio/frequency/ad9832.c
> +++ b/drivers/staging/iio/frequency/ad9832.c
> @@ -112,10 +112,10 @@ struct ad9832_state {
> * transfer buffers to live in their own cache lines.
> */
> union {
> - __be16 freq_data[4]____cacheline_aligned;
> + __be16 freq_data[4];
> __be16 phase_data[2];
> __be16 data;
> - };
> + } __aligned(IIO_DMA_MINALIGN);
> };
>
> static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout)
> --
> 2.37.1
>
--
With Best Regards,
Andy Shevchenko
