On Tue, Aug 02, 2022 at 03:28:09PM +0200, Julien Panis wrote: > > > On 01/08/2022 16:08, Julien Panis wrote: > > > > > > On 31/07/2022 17:41, Jonathan Cameron wrote: > > > On Thu, 28 Jul 2022 19:51:24 +0200 > > > Julien Panis <jpanis@xxxxxxxxxxxx> wrote: > > > > > > > ECAP hardware on AM62x SoC supports capture feature. It can be used > > > > to timestamp events (falling/rising edges) detected on signal > > > > input pin. > > > > > > > > This commit adds capture driver support for ECAP hardware on AM62x SoC. > > > > > > > > In the ECAP hardware, capture pin can also be configured to be in > > > > PWM mode. Current implementation only supports capture operating mode. > > > > Hardware also supports timebase sync between multiple instances, but > > > > this driver supports simple independent capture functionality. > > > > > > > > Signed-off-by: Julien Panis <jpanis@xxxxxxxxxxxx> > > > Hi Julien, > > > > > > So this isn't the first ecap driver we've had proposed, but the previous > > > one was a few years ago and never reached v2. > > > https://lore.kernel.org/all/20200818153614.6438-1-dts86@xxxxxxxxxxx/ > > > > > > Honestly I can't remember much about it, but maybe the discussion around > > > that will be worth a reread. > > > > Hi Jonathan, thank you for your review. > > > > I read the discussion about previous attempt, before submitting this > > patch. There were > > interesting comments indeed. > > > > But in this previous attempt, only one-shot pulses were handled > > (moreover, global IRQ flag > > was not cleared, so I'm not sure that IRQ could be raised more than > > once). > > > > However, ECAP can be used to make time measurements for any type of > > "square waveform". > > That's why I tried to make this event mode configurable. Besides, using > > a continuous mode allows > > handling much more signal types (not only single pulses). > > > > > > > > The use of ABI here is unusual. So I'd definitely like to see some > > > documentation > > > probably as a file in the main kernel documentation to explain what > > > the interface > > > is an how that relates to what is being captured. > > > > OK, I will add some userspace documentation. > > > > > > > > First thing to note here is the channel type of IIO_INDEX is now not > > > actually > > > used any more because we moved all the relevant drivers over to the > > > counter > > > subsystem (and we failed to mark it deprecated). > > > > I evaluated this counter subsystem before starting development. Counting > > events is not "a priori" > > the goal when using ECAP. > > > > Nevertheless, maybe "counter_push_event" function could do the job. If I > > use counter API : > > # Option 1 : CAP1/2/3/4 registers could be seen as 4 channels of the > > same counter... > > but there are not channels, there are just sequential timestamps > > actually. So I'm afraid this leads > > to misunderstanding for the user. > > Moreover, the user will have to read several entries (counts 1/2/3/4) to > > gather timestamps from > > the same input signal, which is not very convenient. > > # Option 2 : Either CAP 1/2/3/4 events could be gathered in a single > > channel...but then it will not > > be possible to configure their polarity (rising/falling edge) > > individually (unless I did > > not understand well counter framework documentation). > > > > So, even with counter framework, it will lead to some diverted use of > > the framwork, since ECAP > > is a very specific hardware that do not fit 100% counter philosophy. > > > > I admit that ECAP do not fit 100% IIO philosophy either. > > > > Maybe misc API would be more relevant actually. Any opinion about it > > will be welcome. :-) > > [Answering my own mail] > > I got a closer look at counter framework. It is not suitable at all for > ECAP. Initially, I thought that > "counter_push_event" function could be used, but the only timestamp handled > by this function > is a software timestamp. I strongly doubt that counter framework maintainer > would accept > some modification here to support hardware timestamp : a patch rejection > would be > legitimate, since a counter is dedicated to "event counting". Whereas ECAP > is dedicated to > "event timestamping". > > Beside, ECAP has 4 timestamp registers but they are used to capture > timestamps for a > single input pin (only 1 channel). In ECAP context, 'index X" is used to > identify CAP X > (used to capture event X detected on a single pin, with X = 0/1/2/3/0...). > In counter framework, "index X" is used to identify channel X (among several > pins). > So, the word "index" has not the same meaning in counter framework than in > ECAP device. > Somehow, this ECAP index (0/1/2/3 for CAP1/2/3/4 registers) must be logged > with timestamp > because it is an important part of signal info for the user (raw consecutive > timestamps > are not enough). > > So, here is my proposal for my next version : > (1) Replace IIO_INDEX by IIO_COUNT channel (already used in > "stm32-timer-trigger.c" driver) > # In ECAP documentation, the word "index" is not used. The word used to > speak about this > 0->1->2->3->0 sequenced counter is "Mod4 counter". > (2) Configure event mode with 4 sysfs entries (to remove the mix of buffers > and events interfaces) > # User will see 4 files (1 file for each CAP timestamp) named > "falling_edge_active_0/1/2/3". > Writing 1 will select falling edge/ Writing 0 will select rising edge. > > Would it be an acceptable alternative for you, Jonathan ? Would either (1) > and/or (2) be a "no-go" ? Hi Julien, I've taken a cursory look over the TI ECAP reference guide and your descriptions in this thread. I think a device driver for this would fit better in the Counter subsystem than IIO. First I want to correct a minor misunderstanding: the "timestamp" member of struct counter_event is simply a way to identify Counter events on the system as a way of grouping multiple Counter watches. In other words, the "timestamp" member here represents when a Counter event was detected by the system, not when an event was logged on the counter device hardware. Instead, hardware timestamps such as the CAPx registers would be provided by the "value" member of struct counter_event. Now, I have a few ideas for how we could expose the timestamps using a Counter device driver, but first I want to make sure I understand correctly what's happening in this device. If I understand correctly, we have the following device components: * CTR: 32-bit counter timer * Mod4: 2-bit counter * CAP1-CAP4: four 32-bit registers, each indepedently store a timestamp * ECAP: input signal providing event trigger edges Four edge polarities are configured corresponding to each CAPx register, yet the input signal is still the same single ECAP pin. The event that is fired is instead determined by the Mod4 counter: when Mod4 is 0 and the edge of ECAP matches the polarity configured for CAP1 then an event is triggered which saves the current CTR value to CAP1 and increments Mod4 to 1, etc. Is my understanding of how this device behaves correct? If so, then one possible way to represent this device in the Counter sysfs tree is something like this: * CTR: /sys/bus/counter/devices/counterX/count0/count * Mod4: /sys/bus/counter/devices/counterX/count1/count * CAP1: /sys/bus/counter/devices/counterX/count1/cap1 * CAP2: /sys/bus/counter/devices/counterX/count1/cap2 * CAP3: /sys/bus/counter/devices/counterX/count1/cap3 * CAP4: /sys/bus/counter/devices/counterX/count1/cap4 * ECAP: /sys/bus/counter/devices/counterX/signal0/signal * polarity1: /sys/bus/counter/devices/counterX/signal0/cap1_polarity * polarity2: /sys/bus/counter/devices/counterX/signal0/cap2_polarity * polarity3: /sys/bus/counter/devices/counterX/signal0/cap3_polarity * polarity4: /sys/bus/counter/devices/counterX/signal0/cap4_polarity This is just a tentative arrangement (you could also include "enable" attributes as well), but it should give you an idea of how it could be organized. In your driver, you could then use counter_push_event() whenever you get an event triggered. In userspace, your application will add Counter watches for the CAPx registers they want. When an event triggers, userspace can then received all four CAP register values at the same time via the respective /dev/counterX character device node. Would this design work for your needs? William Breathitt Gray
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