From: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx> ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 7f270bc9a2d9 ("iio: dac: AD8801: add Analog Devices AD8801/AD8803 support") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx> Acked-by: Nuno Sá <nuno.sa@xxxxxxxxxx> --- drivers/iio/dac/ad8801.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/ad8801.c b/drivers/iio/dac/ad8801.c index 6be35c92d435..919e8c880697 100644 --- a/drivers/iio/dac/ad8801.c +++ b/drivers/iio/dac/ad8801.c @@ -26,7 +26,7 @@ struct ad8801_state { struct regulator *vrefh_reg; struct regulator *vrefl_reg; - __be16 data ____cacheline_aligned; + __be16 data __aligned(IIO_DMA_MINALIGN); }; static int ad8801_spi_write(struct ad8801_state *state, -- 2.36.0