Re: [PATCH 36/92] iio: adc: ti-ads7950: Fix alignment for DMA safety

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On 5/3/22 3:58 AM, Jonathan Cameron wrote:
From: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_ALIGN definition.

Update the comment to include 'may'.

Fixes: 902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
Cc: David Lechner <david@xxxxxxxxxxxxxx>
---

Acked-by: David Lechner <david@xxxxxxxxxxxxxx>




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