On 1/20/22 02:02, Robert Hancock wrote:
Add an entry to the ZynqMP device tree to support the AMS device which
now has a driver in mainline.
Signed-off-by: Robert Hancock <robert.hancock@xxxxxxxxxx>
---
.../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 +++
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 26 +++++++++++++++++++
2 files changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index 1e0b1bca7c94..108592104a1b 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -239,6 +239,10 @@ &lpd_watchdog {
clocks = <&zynqmp_clk LPD_WDT>;
};
+&xilinx_ams {
+ clocks = <&zynqmp_clk AMS_REF>;
+};
Please send this patch out of the series. It should go via soc tree not via iio
tree.
And unfortunately clock is not listed in DT binding document and needs to be
added there.
Can you please send that patch too? dtbs_check reports it as issue.
+
&zynqmp_dpdma {
clocks = <&zynqmp_clk DPDMA_REF>;
};
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 74e66443e4ce..d1fe1e5b46c1 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -878,6 +878,32 @@ lpd_watchdog: watchdog@ff150000 {
timeout-sec = <10>;
};
+ xilinx_ams: ams@ffa50000 {
+ compatible = "xlnx,zynqmp-ams";
+ status = "disabled";
+ interrupt-parent = <&gic>;
+ interrupts = <0 56 4>;
+ reg = <0x0 0xffa50000 0x0 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #io-channel-cells = <1>;
+ ranges = <0 0 0xffa50800 0x800>;
+
+ ams_ps: ams_ps@0 {
+ compatible = "xlnx,zynqmp-ams-ps";
+ status = "disabled";
+ reg = <0x0 0x400>;
+ };
+
+ ams_pl: ams_pl@400 {
+ compatible = "xlnx,zynqmp-ams-pl";
+ status = "disabled";
+ reg = <0x400 0x400>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
zynqmp_dpdma: dma-controller@fd4c0000 {
compatible = "xlnx,zynqmp-dpdma";
status = "disabled";
And this second piece is completely aligned with dt binding that's why it is fine.
Thanks,
Michal