Counter TI-EQEP was tested on TDA4VM/J721E SoC. Overlay used for testing EQEP0 and EQEP1: &cbass_main { #address-cells = <2>; #size-cells = <2>; eqep0: qep@3200000 { compatible = "ti,am3352-eqep"; reg = <0 0x3200000 0 0x100>; power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 94 0>; clock-names = "eqep0-ficlk"; interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>; interrupt-names = "eqep0"; symlink = "bone/eQEP0"; /* A - P9_42, B - P9_27 */ count_mode = <0>; swap_input = <0>; invert_qa = <1>; invert_qb = <1>; invert_qi = <0>; invert_qs = <0>; }; eqep1: qep@3210000 { compatible = "ti,am3352-eqep"; reg = <0 0x3210000 0 0x100>; power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 95 0>; clock-names = "eqep1-ficlk"; interrupts = <GIC_SPI 323 IRQ_TYPE_EDGE_RISING>; interrupt-names = "eqep1"; symlink = "bone/eQEP1"; /* A - P8_35, B - P8_33 */ count_mode = <0>; swap_input = <0>; invert_qa = <1>; invert_qb = <1>; invert_qi = <0>; invert_qs = <0>; }; eqep2: qep@3220000 { status = "disabled"; compatible = "ti,am3352-eqep"; reg = <0 0x3220000 0 0x100>; power-domains = <&k3_pds 96 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 96 0>; clock-names = "eqep2-ficlk"; interrupts = <GIC_SPI 324 IRQ_TYPE_EDGE_RISING>; interrupt-names = "eqep2"; count_mode = <0>; swap_input = <0>; invert_qa = <1>; invert_qb = <1>; invert_qi = <0>; invert_qs = <0>; }; }; Signed-off-by: Jason Kridner <jkridner@xxxxxxxxxxxxxxx> --- drivers/counter/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index 2de53ab0dd25..453490059c88 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -51,7 +51,7 @@ config STM32_LPTIMER_CNT config TI_EQEP tristate "TI eQEP counter driver" - depends on (SOC_AM33XX || COMPILE_TEST) + depends on (SOC_AM33XX || ARCH_K3 || COMPILE_TEST) select REGMAP_MMIO help Select this option to enable the Texas Instruments Enhanced Quadrature -- 2.30.2