Add support to configure sx9360 from dt-binding, to match device
hardware setup.
Signed-off-by: Gwendal Grignou <gwendal@xxxxxxxxxxxx>
---
No changes in v2.
drivers/iio/proximity/sx9360.c | 85 +++++++++++++++++++++++++++++++++-
1 file changed, 84 insertions(+), 1 deletion(-)
diff --git a/drivers/iio/proximity/sx9360.c b/drivers/iio/proximity/sx9360.c
index 5d909c7dfa1d75..3930a3c53b2380 100644
--- a/drivers/iio/proximity/sx9360.c
+++ b/drivers/iio/proximity/sx9360.c
@@ -58,7 +58,7 @@
#define SX9360_REG_AFE_PARAM0_PHR 0x22
#define SX9360_REG_AFE_PARAM1_PHR 0x23
#define SX9360_REG_AFE_PARAM0_PHM 0x24
-#define SX9360_REG_AFE_PARAM0_RSVD 0x04
+#define SX9360_REG_AFE_PARAM0_RSVD 0x08
#define SX9360_REG_AFE_PARAM0_RESOLUTION_MASK GENMASK(2, 0)
#define SX9360_REG_AFE_PARAM0_RESOLUTION_128 0x02
#define SX9360_REG_AFE_PARAM1_PHM 0x25
@@ -69,6 +69,7 @@
#define SX9360_REG_PROX_CTRL0_PHM 0x41
#define SX9360_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3)
#define SX9360_REG_PROX_CTRL0_GAIN_1 0x80
+#define SX9360_REG_PROX_CTRL0_RAWFILT_MASK GENMASK(2, 0)
#define SX9360_REG_PROX_CTRL0_RAWFILT_1P50 0x01
#define SX9360_REG_PROX_CTRL1 0x42
#define SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_MASK GENMASK(5, 3)
@@ -646,6 +647,41 @@ static int sx9360_write_raw(struct iio_dev *indio_dev,
return -EINVAL;
}
+static const struct sx_common_reg_default sx9360_default_regs[] = {
+ { SX9360_REG_IRQ_MSK, 0x00 },
+ { SX9360_REG_IRQ_CFG, 0x00 },
+ /*
+ * The lower 2 bits should not be set as it enable sensors measurements.
+ * Turning the detection on before the configuration values are set to
+ * good values can cause the device to return erroneous readings.
+ */
+ { SX9360_REG_GNRL_CTRL0, 0x00 },
+ { SX9360_REG_GNRL_CTRL1, 0x00 },
+ { SX9360_REG_GNRL_CTRL2, SX9360_REG_GNRL_CTRL2_PERIOD_102MS },
+
+ { SX9360_REG_AFE_CTRL1, 0x00 },
+ { SX9360_REG_AFE_PARAM0_PHR, SX9360_REG_AFE_PARAM0_RSVD |
+ SX9360_REG_AFE_PARAM0_RESOLUTION_128 },
+ { SX9360_REG_AFE_PARAM1_PHR, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF |
+ SX9360_REG_AFE_PARAM1_FREQ_83_33HZ },
+ { SX9360_REG_AFE_PARAM0_PHM, SX9360_REG_AFE_PARAM0_RSVD |
+ SX9360_REG_AFE_PARAM0_RESOLUTION_128 },
+ { SX9360_REG_AFE_PARAM1_PHM, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF |
+ SX9360_REG_AFE_PARAM1_FREQ_83_33HZ },
+
+ { SX9360_REG_PROX_CTRL0_PHR, SX9360_REG_PROX_CTRL0_GAIN_1 |
+ SX9360_REG_PROX_CTRL0_RAWFILT_1P50 },
+ { SX9360_REG_PROX_CTRL0_PHM, SX9360_REG_PROX_CTRL0_GAIN_1 |
+ SX9360_REG_PROX_CTRL0_RAWFILT_1P50 },
+ { SX9360_REG_PROX_CTRL1, SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K },
+ { SX9360_REG_PROX_CTRL2, SX9360_REG_PROX_CTRL2_AVGDEB_2SAMPLES |
+ SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K },
+ { SX9360_REG_PROX_CTRL3, SX9360_REG_PROX_CTRL3_AVGNEG_FILT_2 |
+ SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256 },
+ { SX9360_REG_PROX_CTRL4, 0x00 },
+ { SX9360_REG_PROX_CTRL5, SX9360_REG_PROX_CTRL5_PROXTHRESH_32 },
+};
+
/* Activate all channels and perform an initial compensation. */
static int sx9360_init_compensation(struct iio_dev *indio_dev)
{
@@ -670,6 +706,51 @@ static int sx9360_init_compensation(struct iio_dev *indio_dev)
return ret;
}
+static const struct sx_common_reg_default *
+sx9360_get_default_reg(struct device *dev, int idx,
+ struct sx_common_reg_default *reg_def)
+{
+ u32 raw = 0, pos = 0;
+ int ret;
+
+ memcpy(reg_def, &sx9360_default_regs[idx], sizeof(*reg_def));
+ switch (reg_def->reg) {
+ case SX9360_REG_AFE_PARAM0_PHR:
+ case SX9360_REG_AFE_PARAM0_PHM:
+ ret = device_property_read_u32(dev, "semtech,resolution", &raw);
+ if (ret)
+ break;
+
+ raw = ilog2(raw) - 3;
+
+ reg_def->def &= ~SX9360_REG_AFE_PARAM0_RESOLUTION_MASK;
+ reg_def->def |= FIELD_PREP(SX9360_REG_AFE_PARAM0_RESOLUTION_MASK, raw);
+ break;
+ case SX9360_REG_PROX_CTRL0_PHR:
+ case SX9360_REG_PROX_CTRL0_PHM:
+ ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw);
+ if (ret)
+ break;
+
+ reg_def->def &= ~SX9360_REG_PROX_CTRL0_RAWFILT_MASK;
+ reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL0_RAWFILT_MASK, raw);
+ break;
+ case SX9360_REG_PROX_CTRL3:
+ ret = device_property_read_u32(dev, "semtech,avg-pos-strength",
+ &pos);
+ if (ret)
+ break;
+
+ /* Powers of 2, except for a gap between 16 and 64 */
+ raw = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
+ reg_def->def &= ~SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK;
+ reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK, raw);
+ break;
+ }
+
+ return reg_def;
+}
+
static int sx9360_check_whoami(struct device *dev,
struct iio_dev *indio_dev)
{
@@ -690,12 +771,14 @@ static const struct sx_common_chip_info sx9360_chip_info = {
.mask_enable_chan = SX9360_REG_GNRL_CTRL0_PHEN_MASK,
.irq_msk_offset = 0,
.num_channels = SX9360_NUM_CHANNELS,
+ .num_default_regs = ARRAY_SIZE(sx9360_default_regs),
.ops = {
.read_prox_data = sx9360_read_prox_data,
.check_whoami = sx9360_check_whoami,
.init_compensation = sx9360_init_compensation,
.wait_for_sample = sx9360_wait_for_sample,
+ .get_default_reg = sx9360_get_default_reg,
},
.iio_channels = sx9360_channels,
--
2.34.0.rc2.393.gf8c9666880-goog
