Re: [PATCH 2/5] iio: xilinx-xadc: Fix clearing interrupt when enabling trigger

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On Fri,  3 Apr 2020 15:27:14 +0200
Lars-Peter Clausen <lars@xxxxxxxxxx> wrote:

> When enabling the trigger and unmasking the end-of-sequence (EOS) interrupt
> the EOS interrupt should be cleared from the status register. Otherwise it
> is possible that it was still set from a previous capture. If that is the
> case the interrupt would fire immediately even though no conversion has
> been done yet and stale data is being read from the device.
> 
> The old code only clears the interrupt if the interrupt was previously
> unmasked. Which does not make much sense since the interrupt is always
> masked at this point and in addition masking the interrupt does not clear
> the interrupt from the status register. So the clearing needs to be done
> unconditionally.
> 
> Signed-off-by: Lars-Peter Clausen <lars@xxxxxxxxxx>
Looks good but were is my fixes tag?  :) I fear we have a theme
here!

Jonathan

> ---
>  drivers/iio/adc/xilinx-xadc-core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
> index 4fcf1729341f..04a2a609ced4 100644
> --- a/drivers/iio/adc/xilinx-xadc-core.c
> +++ b/drivers/iio/adc/xilinx-xadc-core.c
> @@ -674,7 +674,7 @@ static int xadc_trigger_set_state(struct iio_trigger *trigger, bool state)
>  
>  	spin_lock_irqsave(&xadc->lock, flags);
>  	xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val);
> -	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, val & XADC_AXI_INT_EOS);
> +	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, XADC_AXI_INT_EOS);
>  	if (state)
>  		val |= XADC_AXI_INT_EOS;
>  	else




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