On Tue, 7 Jan 2020 15:15:59 +0200 Beniamin Bia <beniamin.bia@xxxxxxxxxx> wrote: > From: Michael Hennerich <michael.hennerich@xxxxxxxxxx> > > During initialization adf4371_pll_fract_n_get_rate() is called on all > output channels to determine if the device was setup. In this case > mod2 is zero which can cause a divide by zero exception. > Return before that can happen. I'm confused by this description vs the code. As far as I can see fract_n_get_rate is only called on a sysfs read of the frequency. mod2 is set when fract_n_compute is called in the relevant set_freq calls. This seems to occur on a sysfs set frequency call. So the issue here is that a sysfs read before a write of the frequency will cause a div zero? If so, is there a sane set of initial values we can put in mod2 and friends before exposing them via the device register? If mod2==0 is a valid value and indicates for example that the channel is turned off, then the description should make that clear. Jonathan > > Fixes: 7f699bd149134 ("iio: frequency: adf4371: Add support for ADF4371 PLL") > Signed-off-by: Michael Hennerich <michael.hennerich@xxxxxxxxxx> > Signed-off-by: Beniamin Bia <beniamin.bia@xxxxxxxxxx> > --- > drivers/iio/frequency/adf4371.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4371.c > index e2a599b912e5..c21462238314 100644 > --- a/drivers/iio/frequency/adf4371.c > +++ b/drivers/iio/frequency/adf4371.c > @@ -191,6 +191,9 @@ static unsigned long long adf4371_pll_fract_n_get_rate(struct adf4371_state *st, > unsigned long long val, tmp; > unsigned int ref_div_sel; > > + if (st->mod2 == 0) > + return 0; > + > val = (((u64)st->integer * ADF4371_MODULUS1) + st->fract1) * st->fpfd; > tmp = (u64)st->fract2 * st->fpfd; > do_div(tmp, st->mod2);