The 32-bit Meson SoCs Meson8, Meson8b and Meson8m2 can use the SAR ADC
to read the chip temperature. This requires a few new, optional
properties:
- nvmem-cells and nvmem-cell-names are needed because the temperature
sensor requires calibration to work correctly. The calibration data is
stored in the eFuse.
- amlogic,hhi-sysctrl is needed on Meson8b and Meson8m2 because the 5th
bit of the TSC (temperature sensor calibration coefficient) is stored
in the HHI register region (in the scratch register HHI_DPLL_TOP_0 at
offset 0x318).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
---
.../bindings/iio/adc/amlogic,meson-saradc.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
index 54b823f3a453..75c775954102 100644
--- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
@@ -22,6 +22,16 @@ Required properties:
- vref-supply: the regulator supply for the ADC reference voltage
- #io-channel-cells: must be 1, see ../iio-bindings.txt
+Optional properties:
+- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit
+ of the TSC (temperature sensor coefficient) on
+ Meson8b and Meson8m2 (which used to calibrate the
+ temperature sensor)
+- nvmem-cells: phandle to the temperature_calib eFuse cells
+- nvmem-cell-names: if present (to enable the temperature sensor
+ calibration) this must contain "temperature_calib"
+
+
Example:
saradc: adc@8680 {
compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
--
2.19.1
