On Tue, Oct 31, 2017 at 10:28 PM, Philipp Zabel <philipp.zabel@xxxxxxxxx> wrote: > On Tue, Oct 31, 2017 at 3:12 AM, Joel Stanley <joel@xxxxxxxxx> wrote: >> The ASPEED SoC must deassert a reset in order to use the ADC peripheral. >> >> The device tree bindings are updated to document the resets phandle, and >> the example is updated to match what is expected for both the reset and >> clock phandle. Note that the bindings should have always had the reset >> controller, as the hardware is unusable without it. >> >> Signed-off-by: Joel Stanley <joel@xxxxxxxxx> > > It is unfortunate that this has to break DT (theoretical) backwards > compatibility, but given that the old bindings never worked, > this is better than to pretend a required reset is optional. > > Reviewed-by: Philipp Zabel <philipp.zabel@xxxxxxxxx> Thanks. I agree that it's unfortunate; this has been my first time working on an ARM SoC and there were few things we could have done better in hindsight. I've got similar patches for the ASPEED hwmon pwm/tach driver, and the i2c driver that I'll send out now. Thanks for the review. Cheers, Joel -- To unsubscribe from this list: send the line "unsubscribe linux-iio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
