On 09/07/2012 01:44 PM, Lars-Peter Clausen wrote: > The datasheet is a bit confusing about this. It says that a dataword has 4 > leading zeros, but the first zero is already put on the bus when CS is pulled > low and the second zero is put on the bus on the first leading edge of SCLK, so > when the first bit is sampled on the first trailing edge it will sample what the > datasheet refers to as the second leading zero. Subsequently we only see 3 > leading zeros in the 16 bit dataword and the result we get is shifted to the > left by one bit. Fix this by adjusting the channel shift by 1. > I'll take your word for it :) > Signed-off-by: Lars-Peter Clausen <lars@xxxxxxxxxx> > --- > drivers/staging/iio/adc/ad7476_core.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/staging/iio/adc/ad7476_core.c b/drivers/staging/iio/adc/ad7476_core.c > index 4f6d59e..33435ed 100644 > --- a/drivers/staging/iio/adc/ad7476_core.c > +++ b/drivers/staging/iio/adc/ad7476_core.c > @@ -76,7 +76,7 @@ static int ad7476_read_raw(struct iio_dev *indio_dev, > .sign = 'u', \ > .realbits = bits, \ > .storagebits = 16, \ > - .shift = 12 - bits, \ > + .shift = 13 - bits, \ > }, \ > } > > -- To unsubscribe from this list: send the line "unsubscribe linux-iio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
