On 5/12/22 01:18, Serge Semin wrote:
Synopsys AHCI SATA controller is mainly compatible with the generic AHCI
SATA controller except a few peculiarities and the platform environment
requirements. In particular it can have one or two reference clocks to
feed up its AXI/AHB interface and SATA PHYs domain and at least one reset
control for the application clock domain. In addition to that the DMA
interface of each port can be tuned up to work with the predefined maximum
data chunk size. Note unlike generic AHCI controller DWC AHCI can't have
more than 8 ports. All of that is reflected in the new DWC AHCI SATA
device DT binding.
Note the DWC AHCI SATA controller DT-schema has been created in a way so
to be reused for the vendor-specific DT-schemas (see for example the
"snps,dwc-ahci" compatible string binding). One of which we are about to
introduce.
Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
---
Changelog v2:
- Replace min/max constraints of the snps,{tx,rx}-ts-max property with
enum [ 1, 2, 4, ..., 1024 ]. (@Rob)
---
.../bindings/ata/ahci-platform.yaml | 8 --
.../bindings/ata/snps,dwc-ahci.yaml | 123 ++++++++++++++++++
2 files changed, 123 insertions(+), 8 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
Reviewed-by: Hannes Reinecke <hare@xxxxxxx>
Cheers,
Hannes
--
Dr. Hannes Reinecke Kernel Storage Architect
hare@xxxxxxx +49 911 74053 688
SUSE Software Solutions Germany GmbH, Maxfeldstr. 5, 90409 Nürnberg
HRB 36809 (AG Nürnberg), GF: Felix Imendörffer
