On Thu, Mar 31, 2022 at 07:06:27PM -0500, Rob Herring wrote: > On Thu, Mar 24, 2022 at 03:16:23AM +0300, Serge Semin wrote: > > Synopsys AHCI SATA controller is mainly compatible with the generic AHCI > > SATA controller except a few peculiarities and the platform environment > > requirements. In particular it can have one or two reference clocks to > > feed up its AXI/AHB interface and SATA PHYs domain and at least one reset > > control for the application clock domain. In addition to that the DMA > > interface of each port can be tuned up to work with the predefined maximum > > data chunk size. Note unlike generic AHCI controller DWC AHCI can't have > > more than 8 ports. All of that is reflected in the new DWC AHCI SATA > > device DT binding. > > > > Note the DWC AHCI SATA controller DT-schema has been created in a way so > > to be reused for the vendor-specific DT-schemas. One of which we are about > > to introduce. > > > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > > --- > > .../bindings/ata/snps,dwc-ahci.yaml | 121 ++++++++++++++++++ > > 1 file changed, 121 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml > > > > diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml > > new file mode 100644 > > index 000000000000..b443154b63aa > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml > > @@ -0,0 +1,121 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Synopsys DWC AHCI SATA controller > > + > > +maintainers: > > + - Serge Semin <fancer.lancer@xxxxxxxxx> > > + > > +description: | > > + This document defines device tree bindings for the Synopsys DWC > > + implementation of the AHCI SATA controller. > > + > > +allOf: > > + - $ref: ahci-common.yaml# > > + > > +properties: > > + compatible: > > + oneOf: > > + - description: Synopsys AHCI SATA-compatible devices > > + contains: > > + const: snps,dwc-ahci > > + - description: SPEAr1340 AHCI SATA device > > + const: snps,spear-ahci > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + description: > > + Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock > > + and embedded PHYs reference clock together with vendor-specific set > > + of clocks. > > + minItems: 1 > > + maxItems: 4 > > + > > + clock-names: > > + contains: > > + anyOf: > > + - description: Application AXI/AHB BIU clock source > > + enum: > > + - aclk > > + - sata > > + - description: SATA Ports reference clock > > + enum: > > + - ref > > + - sata_ref > > + > > + resets: > > + description: > > + At least basic core and application clock domains reset is normally > > + supported by the DWC AHCI SATA controller. Some platform specific > > + clocks can be also specified though. > > + > > + reset-names: > > + contains: > > + description: Core and application clock domains reset control > > + const: arst > > + > > +patternProperties: > > + "^sata-port@[0-9a-e]$": > > + type: object > > + > > + properties: > > + reg: > > + minimum: 0 > > + maximum: 7 > > + > > + snps,tx-ts-max: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: Maximal size of Tx DMA transactions in FIFO words > > + minimum: 1 > > + maximum: 1024 > > + > > + snps,rx-ts-max: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: Maximal size of Rx DMA transactions in FIFO words > > + minimum: 1 > > + maximum: 1024 > > Are you reading these somewhere? Yes I do read them in the DWC AHCI driver and use ilog2() to get the corresponding power of two value. > > Only powers of 2 are valid. (Guess what Calxeda's controller uses.) Right and is limited to be within [1; 1024]. Do you suggest to add a respective comment in the description or just manually enumerate the POW2 values? I don't believe there is a ready-to-use power-of-2 type in the /schemas/types.yaml file. BTW what about adding one seeing there are many cases where it could be useful? -Sergey > > Rob
