Hi, does anyone have any feedback on this? It has been over a month since I submitted this patch series. Best Sven On Sun, Jul 19, 2020 at 08:59:35AM +0200, sven.auhagen@xxxxxxxxxxxx wrote: > From: Sven Auhagen <sven.auhagen@xxxxxxxxxxxx> > > Hello, > > there were already 4 versions of this series from Miquèl. > I talked to Miquèl and I fixed up the last comments from v4. > I am looking for feedback if this patch series is now ready to be merged > and what should be further changed. > > Here is the original cover letter: > > Some time ago, when the initial support for Armada CP110 was > contributed, the SATA core was not able to handle per-port > interrupts. Despite the hardware reality, the device tree only > represents one main interrupt for the two ports. Having both SATA > ports enabled at the same time has been achieved by a hack in the ICU > driver(1) that faked the use of the two interrupts, no matter which > SATA port was in use. > > Now that the SATA core is ready to handle more than one interrupt, > this series adds support for it in the libahci_platform code. The > CP110 device tree must be updated to reflect the two SATA ports > available and their respective interrupts. To do not break DT backward > compatibility, the ahci_platform driver now embeds a special quirk > which checks if the DT is valid (only for A8k compatible) and, if > needed, creates the two missing sub-nodes, and assign them the > relevant "reg" and "interrupts" properties, before removing the main > SATA node "interrupts" one. > > (1) The ICU is an irqchip aggregating the CP110 (south-bridge) > interrupts into MSIs for the AP806 (north-bridge). > > Best > Sven > > Changes in v5 > ============= > * Rebase on top of v5.8-rc3 > * Move code to ahci mvebu and use custom functions > > Changes in v4 > ============= > * Rebase on top of v5.2-rc1 > * s/ARM64/arm64/ in the DT change commit title. > > Changes in v3 > ============= > * Removed useless locking when acking the SATA host IRQ_STAT bit. > * As spotted by Hans, do not enable the AHCI_HFLAG_MULTI_MSI flag only > if more than one port is enabled, DTs might declare only one > interrupt and have multiple ports. Added Hans' Reviewed-by tag. > * Added Rob's Reviewed-by tags. > * Added explicit references to the 'Device Tree' being the culprit > for the hacks which are being treated in patch "ata: ahci: mvebu: > Add support for A8k legacy bindings" as suggested by Marc. > * Modified all DTs to avoid enabling/disabling the SATA ports > independently, which does not work. Either both ports are enabled, or > none. Tested on MacchiatoBin that all three availabe ports on the > board are functional. > > Changes in v2 > ============= > * In the AHCI world, the 'irq' is now an '*irqs' array, I ensured it > is allocated even when not using *_platform drivers. > * Moved the whole logic from the generic ahci_platform.c driver to the > Marvell's ahci_mvebu.c driver. > * Dropped the whole DT manipulation quirk. > * Instead used a hack to configure both interrupts when using the > deprecated bindings, this hack is a8k specific but there is a flag > that is passed to the core during the ahci_platform_get_resources() > to indicate that the number of ports must be forced to 2 no matter > the number of child nodes. > * The A8k based Clearfog-GT actually uses the SATA IP (Baruch's info) > so do not remove the SATA node from the DT. Instead, change the DTS > to fit the new bindings (the board only uses the second port at > offset 1). > * Added bindings documentation about the A8k AHCI compatible (existing > in DTs, missing in the doc). > * SATA Sub-nodes representing ports already are documented, I just > added a mention that they can also have an interrupts property which > is mutually exclusive with the root SATA node. > > Miquel Raynal (5): > ata: ahci: mvebu: Rename a platform data flag > ata: ahci: mvebu: Support A8k compatible > irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack > dt-bindings: ata: Update ahci bindings with possible per-port > interrupts > dt-bindings: ata: Update ahci_mvebu bindings > > Sven Auhagen (2): > ata: ahci: mvebu: Add support for A8k legacy DT bindings > arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts > > .../devicetree/bindings/ata/ahci-platform.txt | 7 + > arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 6 +- > drivers/ata/ahci.h | 3 + > drivers/ata/ahci_mvebu.c | 254 +++++++++++++++++- > drivers/ata/libahci.c | 3 +- > drivers/ata/libahci_platform.c | 3 + > drivers/irqchip/irq-mvebu-icu.c | 18 -- > include/linux/ahci_platform.h | 1 + > 8 files changed, 265 insertions(+), 30 deletions(-) > > -- > 2.24.3 (Apple Git-128) >
