On Sat, May 20, 2017 at 1:06 AM, Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
> The NAS4229B and SQ201 Gemini systems have a PATA controller
> which is linked to a SATA bridge in the SoC. Enable both
> platforms to use the PATA/SATA devices.
>
> Cc: John Feng-Hsin Chiang <john453@xxxxxxxxxxxxxxxx>
> Cc: Greentime Hu <green.hu@xxxxxxxxx>
> Acked-by: Hans Ulli Kroll <ulli.kroll@xxxxxxxxxxxxxx>
> Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
> ---
> ChangeLog v1->v2:
> - Cut the timings
(...)
> + ata@63400000 {
(...)
> + /* PIO timings assume 33 MHz bus speed */
> + faraday,pio-active-time = <10>, <10>, <10>, <3>, <3>;
> + faraday,pio-recovery-time = <10>, <3>, <1>, <3>, <1>;
(...)
OK I forgot to cut the timings on the second instance, sorry.
I have removed them now so they are not there when I send this
to the ARM SoC tree.
Yours,
Linus Walleij
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