On Mon, Jan 16, 2012 at 3:54 PM, Alan Cox <alan@xxxxxxxxxxxxxxxxxxx> wrote:
>> Part of the problem with force-enable is that the MMIO BAR may need a
>> value, and not have it. That, and an expectations mismatch between BIOS
>
> That's fine - we can happily assign one at boot time.
Actually, I think the reason that Matthews patch doesn't work for me
is that on my device, BAR #5 really is a _port_ BAR.
I didn't play with it much - busy merging and looking at various other
issues - but I'm starting to wonder whether maybe that 8086:1c01 chip
doesn't support AHCI at all. Or maybe it does something differently.
Other reports of this have BAR#5 either clear, or an MMIO BAR. That
Region 5: I/O ports at ffe0 [size=16]
looks really odd. Matthew's patch uses
pci_assign_resource(pdev, 5);
but if it is a PIO region, that won't help anything..
That may be why it oopses for me - the AHCI driver is trying to use a
PIO address as an MMIO one with readl().
Linus
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