Hello.
On 07-10-2011 7:50, ming.lei@xxxxxxxxxxxxx wrote:
From: Ming Lei<ming.lei@xxxxxxxxxxxxx>
This quirk patch fixes one kind of bug inside some Intel Sandybridge
chipsets, see reports from
https://bugzilla.kernel.org/show_bug.cgi?id=40592.
Many guys also have reported the problem before:
https://bugs.launchpad.net/bugs/737388
https://bugs.launchpad.net/bugs/794642
https://bugs.launchpad.net/bugs/782389
......
With help from Tejun, the problem is found to be caused by 32bit PIO
mode, so introduce the quirk patch to disable 32bit PIO on SATA piix
for some Sandybridge CPT chipsets.
Seth also tested the patch on all five affected chipsets
(pci device ID: 0x1c00, 0x1c01, 0x1d00, 0x1e00, 0x1e01), and found
the patch does fix the problem.
Tested-by: Heasley, Seth<seth.heasley@xxxxxxxxx>
Cc: Alan Cox<alan@xxxxxxxxxxxxxxx>
Signed-off-by: Ming Lei<ming.lei@xxxxxxxxxxxxx>
Acked-by: Tejun Heo<htejun@xxxxxxxxx>
---
v2: avoid to use global flag
---
drivers/ata/ata_piix.c | 37 ++++++++++++++++++++++++++++++++-----
1 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 43107e9..cc431d6 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -113,6 +113,8 @@ enum {
PIIX_PATA_FLAGS = ATA_FLAG_SLAVE_POSS,
PIIX_SATA_FLAGS = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR,
+ PIIX_FLAG_PIO16 = (1<< 30), /*support 16bit PIO only*/
+
Why didn't you declare it with the other PIIX_FLAG_* values?
WBR, Sergei
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