Hi Tejun, I wanted to follow up a bit on your last comments. On Fri, Jul 22, 2011 at 2:03 AM, Tejun Heo <tj@xxxxxxxxxx> wrote: > The problem is that both my and your approach aren't ultimately safe > on this particular IP block. I don't think it's possible make things > completely safe for it. There's no mutual exclusion against PHY > events - be it flaky signal, power surge or actual hotplug - and > driver operation. No matter how careful the driver behaves, if PHY > events happen after the last check before starting DMA engine, DRQ may > be set by the time driver gets to it. Can DRQ be set from 0->1 without a software-initiated action? I didn't think it was directly tied to PHY events, and so we can fairly well predict that it will remain 0. On the other hand, PxSSTS.DET can be affected by PHY, but I don't believe DET != 3 directly triggers this hardware bug. > The IP block you're dealing with is inherently buggy. What the spec > means, I think, is the DMA engine might not start or behave properly > if enabled while DRQ is set, which is fine. Driver will notice that, > reset stuff and retry. It is *completely* different from "the > controller becomes brick until power cycled if that happens". So, we > can work around all we want but that is one buggy controller. If > possible, please tell the manufacturer or licensor to fix it. Yes, I believe the hardware designers know how buggy this is...but it's still worth some effort to fix the software as well as possible for current hardware behavior. > For now, let's first try removing ahci_start_engine() call from > port_start and see how that goes. Thanks for the help, and happy testing! Brian -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
