On 01/13/2011 05:52 AM, ççé wrote:
Hello,
Inside ahci_qc_issue() function, I see that driver always write one bit
to Px.CI register even enable the NCQ.
AHCI allows to fire 32 commands at one time and AHCI driver also
claims itself able to queue up to 31 commands.
Inside ahci.c :
static struct scsi_host_template ahci_sht = {
ATA_NCQ_SHT(DRV_NAME),
.can_queue = AHCI_MAX_CMDS - 1,
............
Why upper layer(Block or SCSI layer) does not fill up as many as possible
commands into Command List before sending the commands out
(Write to Px.CI register)?
The driver successfully executes up to 31 commands at a time, in paralle.
We submit one command at a time to hardware because the block layer
passes commands to us one at a time.
Jeff
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