Hi All I require clarification regarding how bytes are stored in scsi_rw Command Descriptor Block for READ_6/WRITE_6 commands. In the structures below addr is either defined as 3 bytes or 4 bytes or 8 bytes.How does it correspond to CHS in ATA. I assume addr[0]=Cylinder, addr[1]=head and addr[2]=sectors.Is my assumption correct. How does it map if it is 4/8 bytes addr.Is 3 bytes addr corresponds to 24 bit LBA, then how do we map 48 bit LBA. All scsi CDB structures are below.Any inputs will be highly appreciated. //6 byte CDB struct scsi_rw_6 { u_int8_t opcode; u_int8_t addr[3]; /* only 5 bits are valid in the MSB address byte */ #define SRW_TOPADDR 0x1F u_int8_t length; u_int8_t control; }; //10 bytes CDB struct scsi_rw_10 { u_int8_t opcode; #define SRW10_RELADDR 0x01 /* EBP defined for WRITE(10) only */ #define SRW10_EBP 0x04 #define SRW10_FUA 0x08 #define SRW10_DPO 0x10 u_int8_t byte2; u_int8_t addr[4]; u_int8_t reserved; u_int8_t length[2]; u_int8_t control; }; //12 bytes CDB struct scsi_rw_12 { u_int8_t opcode; #define SRW12_RELADDR 0x01 #define SRW12_FUA 0x08 #define SRW12_DPO 0x10 u_int8_t byte2; u_int8_t addr[4]; u_int8_t length[4]; u_int8_t reserved; u_int8_t control; }; //16 bytes CDB struct scsi_rw_16 { u_int8_t opcode; #define SRW16_RELADDR 0x01 #define SRW16_FUA 0x08 #define SRW16_DPO 0x10 u_int8_t byte2; u_int8_t addr[8]; u_int8_t length[4]; u_int8_t reserved; u_int8_t control; }; Thanks Amruth p.v -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html