From: Bartlomiej Zolnierkiewicz <bzolnier@xxxxxxxxx>
Subject: [PATCH] pata_atiixp: move code to be re-used by ide2libata to pata_atiixp.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@xxxxxxxxx>
---
drivers/ata/pata_atiixp.c | 114 ---------------------------------------------
drivers/ata/pata_atiixp.h | 116 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 117 insertions(+), 113 deletions(-)
Index: b/drivers/ata/pata_atiixp.c
===================================================================
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -24,28 +24,6 @@
#define DRV_NAME "pata_atiixp"
#define DRV_VERSION "0.4.6"
-enum {
- ATIIXP_IDE_PIO_TIMING = 0x40,
- ATIIXP_IDE_MWDMA_TIMING = 0x44,
- ATIIXP_IDE_PIO_CONTROL = 0x48,
- ATIIXP_IDE_PIO_MODE = 0x4a,
- ATIIXP_IDE_UDMA_CONTROL = 0x54,
- ATIIXP_IDE_UDMA_MODE = 0x56
-};
-
-static int atiixp_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 udma;
-
- /* Hack from drivers/ide/pci. Really we want to know how to do the
- raw detection not play follow the bios mode guess */
- pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
- if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
- return ATA_CBL_PATA80;
- return ATA_CBL_PATA40;
-}
-
/**
* atiixp_prereset - perform reset handling
* @link: ATA link
@@ -71,97 +49,7 @@ static int atiixp_prereset(struct ata_li
return ata_sff_prereset(link, deadline);
}
-static DEFINE_SPINLOCK(atiixp_lock);
-
-/**
- * atiixp_set_piomode - set PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to set the controller timings for PIO transfers. We must
- * load both the mode number and timing values into the controller.
- */
-
-static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- int dn = 2 * ap->port_no + adev->devno;
- int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
- int pio = adev->pio_mode - XFER_PIO_0;
- u32 pio_timing_data;
- u16 pio_mode_data;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
- pio_mode_data &= ~(0x7 << (4 * dn));
- pio_mode_data |= pio << (4 * dn);
- pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
-
- pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
- pio_timing_data &= ~(0xFF << timing_shift);
- pio_timing_data |= (pio_timings[pio] << timing_shift);
- pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-}
-
-/**
- * atiixp_set_dmamode - set DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the DMA mode setup.
- */
-
-static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- int dma = adev->dma_mode;
- int dn = 2 * ap->port_no + adev->devno;
- u16 tmp16;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- u16 udma_mode_data;
-
- dma -= XFER_UDMA_0;
-
- pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
- udma_mode_data &= ~(0x7 << (4 * dn));
- udma_mode_data |= dma << (4 * dn);
- pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
-
- tmp16 |= (1 << dn);
- } else {
- int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
- u32 mwdma_timing_data;
-
- dma -= XFER_MW_DMA_0;
-
- pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
- &mwdma_timing_data);
- mwdma_timing_data &= ~(0xFF << timing_shift);
- mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
- pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
- mwdma_timing_data);
-
- tmp16 &= ~(1 << dn);
- }
-
- pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-}
+#include "pata_atiixp.h"
static struct scsi_host_template atiixp_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_atiixp.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_atiixp.h
@@ -0,0 +1,116 @@
+
+enum {
+ ATIIXP_IDE_PIO_TIMING = 0x40,
+ ATIIXP_IDE_MWDMA_TIMING = 0x44,
+ ATIIXP_IDE_PIO_CONTROL = 0x48,
+ ATIIXP_IDE_PIO_MODE = 0x4a,
+ ATIIXP_IDE_UDMA_CONTROL = 0x54,
+ ATIIXP_IDE_UDMA_MODE = 0x56
+};
+
+static int atiixp_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 udma;
+
+ /* Hack from drivers/ide/pci. Really we want to know how to do the
+ raw detection not play follow the bios mode guess */
+ pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
+ if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
+ return ATA_CBL_PATA80;
+ return ATA_CBL_PATA40;
+}
+
+static DEFINE_SPINLOCK(atiixp_lock);
+
+/**
+ * atiixp_set_piomode - set PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to set the controller timings for PIO transfers. We must
+ * load both the mode number and timing values into the controller.
+ */
+
+static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ int dn = 2 * ap->port_no + adev->devno;
+ int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
+ int pio = adev->pio_mode - XFER_PIO_0;
+ u32 pio_timing_data;
+ u16 pio_mode_data;
+
+ spin_lock_irqsave(&atiixp_lock, flags);
+
+ pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
+ pio_mode_data &= ~(0x7 << (4 * dn));
+ pio_mode_data |= pio << (4 * dn);
+ pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
+
+ pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
+ pio_timing_data &= ~(0xFF << timing_shift);
+ pio_timing_data |= (pio_timings[pio] << timing_shift);
+ pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
+
+ spin_unlock_irqrestore(&atiixp_lock, flags);
+}
+
+/**
+ * atiixp_set_dmamode - set DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to do the DMA mode setup.
+ */
+
+static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ int dma = adev->dma_mode;
+ int dn = 2 * ap->port_no + adev->devno;
+ u16 tmp16;
+
+ spin_lock_irqsave(&atiixp_lock, flags);
+
+ pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ u16 udma_mode_data;
+
+ dma -= XFER_UDMA_0;
+
+ pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE,
+ &udma_mode_data);
+ udma_mode_data &= ~(0x7 << (4 * dn));
+ udma_mode_data |= dma << (4 * dn);
+ pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE,
+ udma_mode_data);
+
+ tmp16 |= (1 << dn);
+ } else {
+ int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
+ u32 mwdma_timing_data;
+
+ dma -= XFER_MW_DMA_0;
+
+ pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
+ &mwdma_timing_data);
+ mwdma_timing_data &= ~(0xFF << timing_shift);
+ mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
+ pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
+ mwdma_timing_data);
+
+ tmp16 &= ~(1 << dn);
+ }
+
+ pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
+
+ spin_unlock_irqrestore(&atiixp_lock, flags);
+}
--
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