On 01/15/2010 07:23 PM, Sergei Shtylyov wrote: >> Because different controllers have different mechanisms for detecting >> pending IRQ? > > All SFF-8038i (BMIDE) controllers have the same mechanism. They may > have some additional interrupt bits though, reflecting the interrupt > status in both PIO and DMA mode though. Oh, yeah, I was thinking about modern piixs where the bit works as a true IRQ pending bit regardless of command state (it works while even idle). I don't think the original BMIDE IRQ pending bit would be too useful for spurious IRQ detection. It's interlocked with DMA transfer protocol and unless the controller is horribly broken it won't be too useful for spurious IRQ detection. Thanks. -- tejun -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
