> We need to use the MMIO BAR at least for starting DMA transfers, the > I/O ones are 64KB-limited. We can't just use read[bw] if reading all > 32 bits has side effects. Last time I instrumented this on x86 we never issued a > 64K linear block in our s/g lists. In fact we went for years before anyone noticed we had a bug with CS5530 and a couple of other chips that mishandled 64K segment sizes, and that was only finally noticed in a very specific and weird circumstance. > Most of the time there are no problems with MMIO on IXP4xx as modern > devices usually use 32-bit registers anyway, or at least they have no > problem with read[bw] always driving all four PCI byte enable lines > (write[bw] doesn't have this issue). Fair enough -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
