Hi, On Monday 07 December 2009 08:25:52 pm Sergei Shtylyov wrote: > The UltraDMA Tss timing must be stretched with ATA clock of 66 MHz, but the > driver only does this when PCI clock is 66 MHz, whereas it always programs > DPLL clock (which is used as the ATA clock) to 66 MHz. > > Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx> I've reviewed those patches and they all look fine to me. Same with your other HPT3xx pending fixes, namely: * hpt366: fix clock turnaround * pata_hpt3x2n: fix clock turnaround * hpt366: add debounce delay to cable_detect() method PS everything is in my ATA fixes tree now -- Bartlomiej Zolnierkiewicz -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
