On 11/27/2009 01:29 PM, Sergei Shtylyov wrote:
These drivers inherited from the older 'hpt366' IDE driver the buggy timing register masks in their set_piomode() metods. As a result, too low command cycle active time is programmed for slow PIO modes. Quite fortunately, it's later "fixed up" by the set_dmamode() methods which also "helpfully" reprogram the command timings, usually to PIO mode 4; unfortunately, setting an UltraDMA mode #N also reprograms already set PIO data timings, usually to MWDMA mode # max(N, 2) timings... However, the drivers added some breakage of their own too: the bit that they set/clear to control the FIFO is sometimes wrong -- it's actually the MSB of the command cycle setup time; also, setting it in DMA mode is wrong as this bit is only for PIO actually and clearing it for PIO modes is not needed as no mode in any timing table has it set... Fix all this, inverting the masks while at it, like in the 'hpt366' and 'pata_hpt366' drivers; bump the drivers' versions, accounting for recent patches that forgot to do it... Signed-off-by: Sergei Shtylyov<sshtylyov@xxxxxxxxxxxxx> Cc: stable@xxxxxxxxxx --- The patch is against the recent Linus' tree. It's intended to go into all stable kernels starting with 2.6.19, when the PATA drivers were first merged -- the version change hunks should be dropped when merging to the older kernels... drivers/ata/pata_hpt37x.c | 32 +++++++++++++++----------------- drivers/ata/pata_hpt3x2n.c | 17 ++++++++--------- 2 files changed, 23 insertions(+), 26 deletions(-)
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