From: Alan Cox <alan@xxxxxxxxxxxxxxxxxxx>
Date: Tue, 10 Nov 2009 11:11:25 +0000
> Some of the registers involved are deep magic (even with the official
> documentation its unclear what should occur in all cases). I will have
> another dig - probably it depends on the chip rev what the right setting
> is.
So while getting my sunblade up and going, I took a look at the
patch in question. The northbridge logic changed a bit and
I suspect this is part of the problem.
In the IDE layer driver, the guard is:
if (north && north->vendor != PCI_VENDOR_ID_AL)
goto out;
This means the programming is done iff:
1) We find no device at PCI_DEVFN(0,0)
2) We find a device and vendor is ALI
I suspect case #1 triggers on sparc64. The guard in the PATA
driver is:
north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) {
which is different. It won't do the programming if we find no
device at PCI_DEVFN(0,0).
This might be the critical difference, I don't know, just pointing
it out.
I'll do some checks once my slow test system is up and going.
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