Re: PIO with SSDs: needs a long DRQ-after-command timeout for WRITEs

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Alan Cox wrote:
So.. how long does libata and current IDE allow for initial DRQ assertion?
It should probably be at least 500msec or more now.

I think we need to rewrite the PIO code paths to use disable/enable_irq
masking first before getting into adding long delays on PIO paths.
..

Yeah, that would be a good thing to do.
But in the meanwhile, a longer timeout there doesn't affect
any currently working systems -- they'll still wait only as long
as they currently do.  And a longer timeout *will* enable these
SSDs to work where they otherwise would not.

But perhaps the timeout is already long enough?
I don't know where the current timeout is hiding in libata.  :)

Cheers

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