[Bug 9156] IDE DMA <-> CPU HLT <-> EHCI-HCD

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http://bugzilla.kernel.org/show_bug.cgi?id=9156





------- Comment #8 from hancockr@xxxxxxx  2008-12-22 21:06 -------
This should really not be assigned to IDE subsystem, as what seems like is
needed is some kind of chipset-specific PCI quirk. Disabling halt only during
IDE transfers is likely no good solution since other DMA accesses can occur at
any time, often without prior kernel knowledge, and are likely also affected.
The chipset settings likely need to be fixed to not get into this busted state.


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