Hello.
Robert Hancock wrote:
This seems like a risky assumption...
Its wrong on various counts
- ata_id_major_version can't tell early ATA versions apart
- on anything later than the early ISA IDE paddles (the ones that
basically were just bus decoders) its invisible to the drive
Except for legacy ISA bus controllers (and even there it is
questionable)
I would favour simply ignoring it.
32-bit IO wouldn't work on any ISA controller, would it? What happens
if you do 32-bit IO port access on something on the ISA bus?
TTBOM, depending on what's driven by device on -IOCS16, this will
translate into 2, 3, or 4 cycles at the successive addresses. In case of
the IDE data register, this should translate into one 16-bit cycle at
0x1x0, one 8-bit cycle at 0x1x1, and one 8-bit cycle at 0x1x2 which is
of course not what anybody would want...
WBR, Sergei
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