Hello, I just wrote:
I remain unconvinced we should be looking at it anywhere except specific
pure ISA cycle pass through hardware and thus it belongs as a helper for
I'm still not getting how drive can support or not support "DWORD
I/O" -- you certainly can't have 32-bit I/O cycle on ISA (only on
EISA) and you certainly cannot translate 32-bit cycle to the ATA bus.
I remember I had some hypotheses before but they turned out to be
inconsistent.
If only two back-to-back I/O cycles weren't providing enough recovery
time...
MBR, Sergei
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