Alek Du wrote:
Re: [PATCH] ata: Add Intel SCH PATA support
On Sun, 27 Apr 2008 22:03:15 +0800
Alek Du <alek.du@xxxxxxxxx> wrote:
Alan,
One problem I still do not understand, if I return PATA_UNK for cable detection result, could the
driver finally set the disk to UDMA5 mode if I plug in 80 wire disk?
You tell me - you've got the hardware documentation I assume. Assuming the
system implements detection then it should. If a PATA controller doesn't
implement any detection (cable or host side) and it does UDMA5 then I
believe the correct description for it is usually "broken" as people will
have horrible problems trying to use things like flash drives with it.
Alan
The data sheet of SCH (http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf) page 347 shows
the only supported PATA registers, for those not shown should be treated as "Reserved".
Unfortunately, IOCFG (0x54) and port enable bits (0x41, 0x43) are all reserved.
If you'd actually compared the datasheet to the driver and/or the PIIX/ICH
datasheets, you would have seen that SCH is not compatible to PIIX/ICH. It
doesn't have PIO/DMA and UDMA timing and UDMA enable registers at config.
space offsets 0x4x but instead has pair of drive timing registers (SCH PATA
controller is single-channel) controlling PIO/DMA/UDMA speeds each at 0x8x,
laid out completely differently: PIIX/ICH timing registers fields encoded
cycle counts which SCH registers fileds encode mode numbers themselves.
Let's regard SCH PATA controller is an usually "broken" one :-), what do you suggest me to work around it?
Let's regard it as the one deserving its own driver. ;-)
Thanks,
Alek
MBR, Sergei
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