Hi all, The BIOS (Asus A8V Deluxe) is setting incorrectly PCI Cache Line Size Register (as seen in lspci -vvv output), so try to correct it by pci_try_set_mwi(pdev). Marin Mitov ---------------------------------------------------------- Enable Memory-Write-and-Invalidate in sata_promise driver and get rid of strange BIOS-set value for cache line size register. According to Documentation/pci.txt: "This enables... ...and also ensures that the cache line size register is set correctly". Signed-off-by: Marin Mitov <mitov@xxxxxxxxxxx> ---------------------------------------------------------- --- a/drivers/ata/sata_promise.c 2008-04-22 13:09:15.000000000 +0300 +++ b/drivers/ata/sata_promise.c 2008-04-22 13:11:01.000000000 +0300 @@ -1114,6 +1114,7 @@ static int pdc_ata_init_one(struct pci_d /* start host, request IRQ and attach */ pci_set_master(pdev); + pci_try_set_mwi(pdev); return ata_host_activate(host, pdev->irq, pdc_interrupt, IRQF_SHARED, &pdc_ata_sht); } -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
