Re: FIS structure and Command List structure for AHCI SATA controller

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Nov 08, 2007 at 10:38:25PM -0500, mike zheng wrote:
> I am working on an AHCI SATA controller. For each port, there is one
> FIS descriptor and one Command List, which points to a Received FIS
> structure and Command List structure. So what is Received FIS
> structure? The Command List structure points to Command Table, that
> has Command FIS field and Physical Region Descriptor table. I assume
> the Command table is used for the communication between processor and
> the SATA controller. Then why do we need the Received FIS structure?

The driver actually doesn't need it at all, though a few ideas are
floating around for using it.

However, it's required by the hardware by definition -- you must
provide a buffer for incoming FIS's (P0FB), before enabling FIS
reception (P0CMD bit 4, FRE).

If I had to guess, the hardware dumps the RX FIS into host memory rather
than having additional internal buffers/FIFOs...

	Jeff



-
To unsubscribe from this list: send the line "unsubscribe linux-ide" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[Index of Archives]     [Linux Filesystems]     [Linux SCSI]     [Linux RAID]     [Git]     [Kernel Newbies]     [Linux Newbie]     [Security]     [Netfilter]     [Bugtraq]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Samba]     [Device Mapper]

  Powered by Linux