Re: Read Prefetch, Post Write on IDE chipsets

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Sun, 02 Sep 2007 13:51:43 +0100
Matt Sealey <matt@xxxxxxxxxxxxxx> wrote:

> Hi guys,
> 
> Does anyone have any decent information on the purpose, performance potential
> or perhaps quirks of the "read prefetch" and "post write" buffer features on
> some IDE chipsets?
> 
> It doesn't look like any standard but at least is included in quite a few
> of the libata drivers, and a lot of x86 BIOS control has toggles to try and
> turn it on or off.
> 
> But, what is it? I've never seen any documentation but which register to use
> to toggle it.. no vendor recommendations to turn it on, it seems like a rather
> secret feature..?

Chipset specific. Some public documentation discusses it for certain
chips (eg the Intel ATA tuning guidelines). For others you may need the
BIOS vendor manual or similar.

Alan
-
To unsubscribe from this list: send the line "unsubscribe linux-ide" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[Index of Archives]     [Linux Filesystems]     [Linux SCSI]     [Linux RAID]     [Git]     [Kernel Newbies]     [Linux Newbie]     [Security]     [Netfilter]     [Bugtraq]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Samba]     [Device Mapper]

  Powered by Linux