Bob Ham wrote:
HPT374 BIOS seems to only save f_CNT register value for the function #0 before re-tuning DPLL causing the driver to report obviously distorted f_CNT for the function #1 -- fix this by always reading the saved f_CNT register value from in the init_chipset() method the function #0 of HPT374 chip. While at it, introduce 'chip_type' for the copy of the 'struct hpt_info' member and replace the structure assignment by memcpy()...
HPT374: IDE controller at PCI slot 0000:00:0d.0 ACPI: PCI Interrupt 0000:00:0d.0[A] -> GSI 16 (level, low) -> IRQ 16 HPT374: chipset revision 7 HPT374: DPLL base: 48 MHz, f_CNT: 142, assuming 33 MHz PCI HPT374: using 50 MHz DPLL clock HPT374: 100% native mode on irq 16 ide2: BM-DMA at 0xec00-0xec07, BIOS settings: hde:DMA, hdf:pio ide3: BM-DMA at 0xec08-0xec0f, BIOS settings: hdg:DMA, hdh:pio ACPI: PCI Interrupt 0000:00:0d.1[A] -> GSI 16 (level, low) -> IRQ 16 HPT374: DPLL base: 48 MHz, f_CNT: 142, assuming 33 MHz PCI HPT374: using 50 MHz DPLL clock ide4: BM-DMA at 0xed00-0xed07, BIOS settings: hdi:DMA, hdj:pio ide5: BM-DMA at 0xed08-0xed0f, BIOS settings: hdk:DMA, hdl:pio
again, followed by a hard lock
Hm, well, this is indeed tough case but at least it prodded me to fix some issues. Maybe it's worth for you to file a bug at bugzilla.kernel.org...
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