Daniel J Blueman wrote: > Tejun, > > On 03/08/07, Tejun Heo <htejun@xxxxxxxxx> wrote: >> Daniel J Blueman wrote: >>> The ICH8 south-bridge I have is the mobile variant and does come >>> equipped with native parallel IDE - see page 447: >>> http://download.intel.com/design/chipsets/datashts/31305603.pdf . I do >>> see 35MB/s with DMA enabled from my CF on the 1 in 15 times the >>> libata-kernel does work. >>> >>> I can dump off and decode the configuration registers for the timing >>> and bus master registers in the working and non-working libata cases, >>> and the legacy ATA working case and see what's different. >> Does the attached patch change anything? > > This addresses the issue 100%! > > Due to the differences between the ICH8 non-mobile and mobile > variants, I've cooked the change into a new initialisation structure > for the ICH8M in the attached patch, if that helps at all. > > The changes thus affect (correct) behaviour on the ICH8M in IDE mode > only...so should be safe for inclusion. There may be a similar > situation with ICH9Ms also. [cc'ing Kristen, hello] I think [P0 P2 IDE IDE] is correct for MAP 01b but can't find anything about it in the datasheet or spec update. Kristen, can you please verify this. The following bug is also fixed by using [P0 P2 IDE IDE]. http://bugzilla.kernel.org/show_bug.cgi?id=8809 Thanks. -- tejun - To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
